1. Field of the Disclosure
The disclosure relates to a display device, and more particularly, to an array substrate for a display device including an organic thin film transistor that has an organic semiconductor layer and a method of fabricating the same.
2. Discussion of the Related Art
With rapid development of information technologies, display devices for displaying a large amount of information have been promptly developed. More particularly, flat panel display (FPD) devices having a thin profile, light weight and low power consumption such as organic electroluminescent display (OLED) devices and liquid crystal display (LCD) devices have been actively pursued and are replacing the cathode ray tubes (CRTs).
Among the liquid crystal display devices, active matrix type liquid crystal display devices, which include thin film transistors to control on/off respective pixels, have been widely used because of their high resolution, color rendering capability and superiority in displaying moving images.
In addition, organic electroluminescent display devices have been recently spotlighted because they have many merits as follows: the organic electroluminescent display devices have high brightness and low driving voltages; because they are self-luminous, the organic electroluminescent display devices have excellent contrast ratios and ultra thin thicknesses; the organic electroluminescent display devices have a response time of several micro seconds; there are advantages in displaying moving images; the organic electroluminescent display devices have wide viewing angles and are stable under low temperatures; and since the organic electroluminescent display devices are driven by a low voltage of direct current (DC) 5V to 15V, it is easy to design and manufacture driving circuits.
Each of the active matrix type liquid crystal display devices and the active matrix type organic electroluminescent display devices includes an array substrate having thin film transistors as switching elements to control on/off their respective pixels.
FIG. 1 is an exploded perspective view of an LCD device, which is one of the flat panel display devices.
As shown in FIG. 1, the LCD device includes an array substrate 10, a color filter substrate 20 and a liquid crystal layer 30. The array substrate 10 and the color filter substrate 20 face each other, and the liquid crystal layer 30 is interposed therebetween.
The array substrate 10 includes a first transparent substrate 12 and gate lines 14 and data lines 16 on an upper surface of the first transparent substrate 12. The gate lines 14 and the data lines 16 cross each other such that regions formed between the gate and data lines 14 and 16 are defined as pixel regions P. A thin film transistor Tr is formed at each crossing portion of the gate and data lines 14 and 16, and a pixel electrode 18 is formed in each pixel region P and connected to the thin film transistor Tr.
The color filter substrate 20 includes a second transparent substrate 22 and a black matrix 25, a color filter layer 26, and a common electrode 28 on a rear surface of the second transparent substrate 22 facing the array substrate 10. The black matrix 25 has a lattice shape to shield a non-display area such as the gate lines 14, the data lines 16, the thin film transistors Tr, and so on. The color filter layer 26 includes red, green and blue color filter patterns 26a, 26b, and 26c repeatedly arranged in order. Each of the color filter patterns 26a, 26b, and 26c corresponds to each pixel region P. The common electrode 28 is formed on the black matrix 25 and the color filter layer 26 and over an entire surface of the substrate 22.
Although not shown in the figure, a seal pattern is formed between the array substrate 10 and the color filter substrate 20 along their peripheries to prevent liquid crystal molecules of the liquid crystal layer 30 from leaking. An alignment layer (not shown) is formed between the liquid crystal layer 30 and each of the array substrate 10 and the color filter substrate 20 to determine an initial direction of the liquid crystal molecules. First and second polarizers (not shown), which have respective polarization axes perpendicular to each other, are disposed on outer surfaces of the array substrate 10 and the color filter substrate 20, respectively. A backlight unit (not shown) is disposed over an outer surface of the array substrate 10 to provide light.
Scan signals for turning on/off the thin film transistors Tr are sequentially applied to the gate lines 14, and data signals are applied to the pixel electrodes 18 in the selected pixel regions P through the data lines 16. An electric field perpendicular to the substrates 12 and 22 is induced between the pixel electrodes 18 and the common electrode 28. The arrangement of the liquid crystal molecules is controlled by the electric field, and the transmittance of light is changed by varying the arrangement of the liquid crystal molecules to thereby display various images.
Meanwhile, in the LCD device having the above-mentioned structure, glass substrates have been commonly used for the first and second transparent substrates 12 and 22 of the array substrate 10 and the color filter substrate 20. Recently, LCD devices using plastic substrates, which are lighter than glass substrates and less broken due to their flexibility, have been needed as small portable devices such as notebook computers or personal digital assistants (PDAs) have been widely used.
However, to fabricate the array substrate, since many processes are performed under high temperatures more than 200 degrees of Celsius, there are difficulties in manufacturing the array substrate using the plastic substrate, which is less heat resistance and chemical resistance than a glass substrate.
In addition, when the signal lines and the pixels including thin film transistors are formed under relatively low temperatures less than 200 degrees of Celsius, forming metallic materials for the signal lines and electrodes and a passivation layer under lower temperatures does not affect characteristics of the thin film transistors. However, in case of the semiconductor layer in which a channel is formed as a path for carriers, if the semiconductor layer is formed by depositing amorphous silicon, which is generally used, under lower temperatures less than 200 degrees of Celsius, the inside structure of the semiconductor layer is not closely formed. As a result, important characteristics such as mobility in the semiconductor, etc. are rapidly lowered, whereby reliability of the thin film transistor is declined.
Thus, generally, a plastic substrate has been used for the color filter substrate of the upper substrate, and a common glass substrate has been used for the array substrate of the lower substrate.
For the same reason, in an organic electroluminescent display device, a glass substrate has been generally used for an array substrate which includes thin film transistors of switching elements and driving elements.
Therefore, to overcome these problems, an array substrate including a thin film transistor having an organic semiconductor layer instead of amorphous silicon has been suggested. Even though the organic semiconductor layer is formed under lower temperatures less than 200 degrees of Celsius, the organic semiconductor layer has superior reliabilities.
Fabricating an array substrate including a thin film transistor having an organic semiconductor layer is not limited to a plastic substrate but can be applied to a glass substrate.
Hereinafter, a structure of an array substrate including an organic semiconductor layer will be described. Here, the organic semiconductor layer is formed under lower temperatures less than 200 degrees of Celsius.
FIG. 2 is a cross-sectional view of a pixel region of an array substrate including a thin film transistor having an organic semiconductor layer of the related art.
As shown in FIG. 2, in an array substrate including a thin film transistor OTr having an organic semiconductor layer 120 of the related art, source and drain electrodes 110 and 115 are formed in each pixel region P on an insulating substrate 101 and spaced apart from each other. An organic semiconductor layer 120 of an island shape is formed to correspond to an area between the source and drain electrodes 110 and 115. A data line (not shown) is also formed on the insulating substrate 101. The data line is connected to the source electrode 110 and extends along a direction.
A gate insulating pattern 125 and a first gate electrode 130 are formed on the organic semiconductor layer 120. The gate insulating pattern 125 and the first gate electrode 130 have the same plane shape as the organic semiconductor layer 120.
A first passivation layer 140 is formed of an organic insulating material and covers the first gate electrode 130. The first passivation layer has a gate contact hole 143 exposing the first gate electrode 130 and a first hole 145 exposing the drain electrode 115. A second gate electrode 150 and an auxiliary pattern 152 are formed on the first passivation layer 140. The second gate electrode 150 contacts the first gate electrode 130 through the gate contact hole 143, and the auxiliary pattern 152 contacts the drain electrode 115 through the first hole 145.
A gate line 154 is formed on the first passivation layer 140 and is connected to the second gate electrode 150.
A second passivation layer 160 covers the second gate electrode 150 and the gate line 154 and has a second hole 163 exposing the auxiliary pattern 152. A pixel electrode 170 is formed on the second passivation layer 160 in each pixel region P and contacts the auxiliary pattern 152 connected to the drain electrode 115 through the second hole 163.
In the array substrate including the thin film transistor OTr having the organic semiconductor layer 120 of the related art, an organic semiconductor material of the organic semiconductor layer 120 is very vulnerable to developer for patterning photoresist or etchant for etching metallic materials. Specially, if a portion for the channel between the source and drain electrodes 110 and 115 is exposed to the developer or the etchant, characteristics of the transistor may be severely degraded. To prevent this, the gate insulating pattern 125 and the first gate electrode 130 are formed on the organic semiconductor layer 120 to have the same plane shape as the organic semiconductor layer 120.
More particularly, in case that the organic semiconductor layer 120 of a certain shape is formed, the organic semiconductor material does not have a photosensitive property. Therefore, to pattern the organic semiconductor material, light-exposing, developing and etching processes using a photosensitive material should be performed. If the organic semiconductor material is exposed to developer for a photoresist, which is widely used in a patterning process, the inside structure of the organic semiconductor material is damaged. Thereby, semiconductor properties are lowered, a degradation speed is increased, and time for driving the transistor gets short. To prevent theses, the organic semiconductor layer 120, the gate insulating pattern 125 and the first gate electrode 130 are simultaneously formed through the same mask process.
Accordingly, in the array substrate including the thin film transistor OTr having the organic semiconductor layer 120 of the related art, the gate electrode is divided into the first and second gate electrodes 130 and 150, which are separately formed on different layers. This causes a raise in manufacturing costs, and manufacturing processes and time increase due to an additional process, thereby lowering productivity.